Saturday, July 2, 2016

aaaaaaaand...I've designed an Alto.

After seeing this fascinating blog post from Ken Shirriff about restoring a Xerox Alto computer, I realized much to my surprise, that my homebrew CPU project was, more or less, identical to the internal architecture of the Alto.  This doesn't mean I'm some kind of super genius on par with the PARC elite, but rather that by limiting myself to 7400-series logic as the basis for my CPU, and by deciding to use a 16-bit data/memory bus, that ultimately the most practical design was one centered around the 74181 ALU.

After reading about how the Alto is designed, I think I'm going to use it for further inspiration for how to design my own CPU.

As you can see from the dearth of posts to my blog, however, development has basically stalled indefinitely.  I'm hoping to start over yet again, this time by designing the whole CPU in Verilog/VHDL and uploading it to an FPGA.  That way I can validate the design and have a much better way to test and validate each component of the system: by interfacing my own boards with the FPGA core, I can confirm that the physical components behave identically to the verified and correct design as implemented in software.  One by one, I can reimplement the FPGA core's functional units in hardware, and eventually discard the FPGA all together.

This approach could end up being a bit more fun as well, since it means I can start by implementing some I/O devices, without having to have the whole CPU up and running first.  That way I can write some sample software for the CPU, to make sure I've got sufficient functionality built into the design.  Then when I actually do build the physical boards, I'll know that I'm not missing some critical functionality that will be difficult or impossible to hack in later.

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