Demonstrating a Schmitt Trigger

In my last batch of parts from Jameco, I also picked up a hex Schmitt Trigger. Schmitt triggers are nice because they don't suffer from the bouncing effects of a normal inverter. The input signal must drop below a certain threshold for the output to go high, and it must go above a different threshold for the output to go low. I did some traces on my analyzer to demonstrate the difference.

The circuit involved looks like this:


The RC circuit gives a slow rise from 0 to 5v when power is first applied. That input goes into an inverter, so that the RST signal goes low some short time after power up. The OR gate collects the RC circuit and the RST toggle switch into a single signal. The debouncer cleans up the mess that the (non-Schmitt Trigger) inverter makes of the RC signal, and the D-flip-flop ensures that the RST signal only changes on the falling clock edge (and conveniently provides a !RST signal too).

Here's what the timing run looks like with a normal inverter:

Notice that the output of the initial inverter bounces for over 12ms as the voltage rises. The debouncer removes the jitter and provides a clean edge to the signal, which is picked up on the flip-flop output at the next falling clock edge (not shown).

Now here's the same trace, but I've replaced the inverter on my board with the Schmitt Trigger:

No bouncing! So if I'd used a Schmitt Trigger in the first place, I could have avoided the debouncing step, right?

Not really. The clock circuit I'm using depends on an inverter that behaves in a somewhat analog fashion. With the Schmitt Trigger in there, the clock doesn't tick properly. So rather than have a whole separate IC on the board just for power-on-reset debouncing, I just utilized a few more channels from the debouncing chip (which was already on the board anyway for the toggle switches).