Notice the logic analyzer -- very handy for verifying expected clock frequencies as well as the effectiveness of the debouncing and synchronization latches for the power-on-reset circuitry.
...and the backside of the finished board. The empty side will be populated with the transceivers and shrouded connectors as soon as they arrive in the mail. This is my first time soldering a perf board like this since college...so I'm still a little rusty.
Front side of the finished board. Definitely much tidier. The DIP switches at the top left are the clock frequency selectors. The legend is on the chart at the bottom right. The CLK toggle at the top is for manipulating the clock signal when in manual clock mode. The RST toggle is self-explanatory, except to note that the signal runs through a debouncer and a D-latch to ensure that you always come out of reset on the falling edge of the clock.
- 7805 5V regulator
- EDE2008 debouncer
- 4020 14-stage binary counter
- 4069 hex inverter (1/2 used)
- 4051 3:8 single channel multiplexer
- 4013 dual D flip flop (1/2 used)
- 7432 quad 2-input OR gate (1/4 used)