Tuesday, February 23, 2010

System Architecture

Drew up the system architecture. The modules (gray units) are individually selected by the first two bits of the instruction. That way I can isolate each board for different types of instructions. Each board will have five bits of "instruction" to work with. The wide buses will be implemented using 40-pin rounded IDE cables (32 bits + 8 bits of control) .

The register file is where everything happens -- all of the instruction-processing units select one or two registers to read, the contents of which will be presented on the "blue" bus. They can also select a third register to write -- this can be the one of the registers being read. Registers/RAM are written on the rising clock edge.

The program counter presents the current instruction to all of the processing modules. It has a single feedback link to the jump/shift unit, which is capable of writing a new 15-bit address into the counting register. The program counter commits data and presents a new instruction on the falling clock edge.

Sunday, February 21, 2010

Program Counter plans

Drew up the program counter plans in gschem. Again, the final results are tidy and nice-looking, but I don't like how gschem restricts you to a tiny box within which to put all the components...

Saturday, February 20, 2010

Control Unit is done!

Finished up the control unit today. All that is left is to add the transceivers and six connectors that will carry the clock, power, and reset signals to the other boards. Here's my workspace:

Notice the logic analyzer -- very handy for verifying expected clock frequencies as well as the effectiveness of the debouncing and synchronization latches for the power-on-reset circuitry.

...and the backside of the finished board. The empty side will be populated with the transceivers and shrouded connectors as soon as they arrive in the mail. This is my first time soldering a perf board like this since college...so I'm still a little rusty.

Front side of the finished board. Definitely much tidier. The DIP switches at the top left are the clock frequency selectors. The legend is on the chart at the bottom right. The CLK toggle at the top is for manipulating the clock signal when in manual clock mode. The RST toggle is self-explanatory, except to note that the signal runs through a debouncer and a D-latch to ensure that you always come out of reset on the falling edge of the clock.

Chips used:
  • 7805 5V regulator
  • EDE2008 debouncer
  • 4020 14-stage binary counter
  • 4069 hex inverter (1/2 used)
  • 4051 3:8 single channel multiplexer
  • 4013 dual D flip flop (1/2 used)
  • 7432 quad 2-input OR gate (1/4 used)

Friday, February 19, 2010

Better schematic

The clock unit was the first schematic I drew up. They got much better looking as I went on. For example, this is the load/store unit...

Electronic or Paper?

I tried using gschem today to draw up the program counter circuit, which I had already drawn up on paper. I found laying out the circuit in an EDA tool cold and unforgiving. Paper was much more satisfying. What do you think? I'm thinking I'll stick with paper, especially given that I've already completed all the plans on good ol' graph paper...

New Blog

I've decided to go ahead and create a blog to document my progress on building my homebrew CPU. It's not going to be an easy project. It's not going to be a short project. But I do expect it to be pretty fun. Believe it or not, I'm in pretty good company when it comes to building homebrew CPUs:

  • BMOW - Big Mess O' Wires - this is the first homebrew CPU I'd ever seen. The designer is a lot like me -- not an electrical engineer, just a hobbyist. He built a very impressive working computer using wire-wrap sockets. Wow.
  • MyCPU - Another very impressive project. This guy is definitely on the "high end" of homebrew design, complete with a passive backplane and replaceable cards in his design. Oh, and custom printed PCBs!! He's even published all of his work so you can build one yourself (which many have done). His homebrew CPU is even network-connected, runs Minix, and hosts his webserver. Wow.
  • HomebrewCPU - I stumbled upon this one when creating this blog -- I wanted to use homebrewcpu.blogspot.com but it was taken. Haven't read much into this guy's blog, but he looks to be doing about the same thing I want to do.
  • Props to my friend Sean for sending me this link...
So just what is it that I am trying to do?

Project Goals:
  • HAVE FUN! Any of the rules may be broken if following them starts to feel more like drudgery than a fun project.
  • Design a functional, programmable CPU that is capable of doing useful things, like playing Tetris, Pong, or maybe even a custom OS.
  • The design will all be done using (effectively) pencil and paper. Not because there isn't automation software available (see here), but because there's something visceral and interesting about getting down to basics.
  • NO MICROCONTROLLERS! I would feel like that's totally cheating. The design will be comprised of mostly 4700 and 4000-series logic, with more complex circuits for things like the ROM and RAM. Pre-programmed microcontrollers like the EDE707 I'll use for non-essential stuff like driving LED displays.
  • KISS - gotta keep it simple, since I'm not an EE and won't be able to debug really hairy stuff.
  • No custom PCBs. Too much work, feels like cheating since I don't have to solder anything but the pins. Automatic place and route takes all the satisfaction out of completing a complex build.
  • No microcode. Sound impossible? It's not. In fact, I've already finished my instruction set and have figured out how to design the CPU to work without a single microcode unit. The most complex "microcode" will be a few (as in 1-2 per board) AND and OR gates.
  • It's gotta look cool. Lots of blinky LEDs and 7-segment displays so that you can "see" the CPU functioning.
Target System Architecture

After a fair amount of research, I've determined that this will be an optimal architecture for my design. Again, I'm in good company -- this is how most other homebrew CPU designers setup their systems.
  • 16-bit registers and ALU
  • 24-bit fixed-width instructions
  • Harvard architecture design (as opposed to a von Neumann architecture)
  • Single-cycle operation. This requires more chips (everything has to be parallel) but is much easier to design and debug.
Build Strategy

This is a big project, so I need to make sure that I'm able to build it in discrete chunks, each of which plug into the larger architecture and work largely independent of each other. I've designed seven major components, that I plan to build in this order:
  1. Control Unit - Power, reset, and clock signals for the whole design
  2. Program Counter - EEPROM unit and 16-bit loadable address register
  3. Register File - 4x 16-bit registers with 2 reads and 1 write to any of the four
  4. Jump/Shift Unit
  5. Arithmetic Logic Unit - 16-bit parallel ALU based on the 74181 chip
  6. Load/Store Unit - 512K RAM in 16-bit words
  7. I/O unit - graphical LCD display and keyboard input
So here we go!

So that's it -- a quick summary of the design. As we speak I already have the schematics done, the instruction set figured out, and I'm about halfway through building the control unit. I'll be posting pictures, progress, etc. as I get more time.